"Technology mapping for low power in logic synthesis."

Vivek Tiwari, Pranav Ashar, Sharad Malik (1996)

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DOI: 10.1016/0167-9260(96)00002-8

access: closed

type: Journal Article

metadata version: 2023-09-30

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Vivek Tiwari, Pranav Ashar, Sharad Malik:
Technology mapping for low power in logic synthesis. Integr. 20(3): 243-268 (1996)

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