"Single Chip Implementation of Encoder-Decoder for Low Bit Rate Visual ..."

Koji Miyanohana et al. (1997)

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DOI: 10.1142/S0218126697000334

access: closed

type: Journal Article

metadata version: 2020-08-25

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  - https://dblp.org/rec/journals/jcsc/MiyanohanaFYOS97
Koji Miyanohana, Gen Fujita, Kazuhiro Yanagida, Takao Onoye, Isao Shirakawa:
Single Chip Implementation of Encoder-Decoder for Low Bit Rate Visual Communication. J. Circuits Syst. Comput. 7(5): 441-458 (1997)

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