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"Design and Implementation of 32-Bit High Valency Jackson Adders."

N. Poornima, V. S. Kanchana Bhaaskaran (2017)

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DOI: 10.1142/S0218126617501237

access: closed

type: Journal Article

metadata version: 2020-08-25

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  - journals/jcsc/PoornimaB17
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  - https://dblp.org/rec/journals/jcsc/PoornimaB17
N. Poornima, V. S. Kanchana Bhaaskaran:
Design and Implementation of 32-Bit High Valency Jackson Adders. J. Circuits Syst. Comput. 26(7): 1750123:1-1750123:18 (2017)

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