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"New Topology Approach for Future Process, Voltage and Temperature Aware ..."

Nandakishor Yadav, Manisha Pattanaik, G. K. Sharma (2015)

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DOI: 10.1166/JOLPE.2015.1363

access: closed

type: Journal Article

metadata version: 2020-05-22

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  dblp key:
  - journals/jolpe/YadavPS15
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  - https://dblp.org/rec/journals/jolpe/YadavPS15
Nandakishor Yadav, Manisha Pattanaik, G. K. Sharma:
New Topology Approach for Future Process, Voltage and Temperature Aware SRAM Using Independently Controlled Double-Gate FinFET. J. Low Power Electron. 11(1): 49-62 (2015)

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