"Set associative address mapping to improve data throughput and reduce tail ..."

Aobo Yang et al. (2025)

> Home

Details and statistics

DOI: 10.1016/J.SYSARC.2025.103445

access: closed

type: Journal Article

metadata version: 2025-09-11

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/jsa/YangWWYSZCL25
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/jsa/YangWWYSZCL25
Aobo Yang, Jiaojiao Wu, Jiaxu Wu, Fan Yang, Zhibing Sha, Shiyu Zhong, Zhigang Cai, Jianwei Liao:
Set associative address mapping to improve data throughput and reduce tail latency in SSDs. J. Syst. Archit. 166: 103445 (2025)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.