Stop the war!

Остановите войну!

for scientists:

default search action

combined dblp search
author search
venue search
publication search

ask others

"A 72-fs-Total-Integrated-Jitter Two-Core Fractional-N Digital PLL With ..."

Francesco Buccoleri et al. (2023)

> Home

Details and statistics

DOI: 10.1109/JSSC.2022.3228899

access: closed

type: Journal Article

metadata version: 2023-03-11

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/jssc/BuccoleriDTASISCBBSLL23
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/jssc/BuccoleriDTASISCBBSLL23
Francesco Buccoleri, Simone Mattia Dartizio, Francesco Tesolin, Luca Avallone, Alessio Santiccioli, Agata Iesurum, Giovanni Steffan, Dmytro Cherniak, Luca Bertulessi, Andrea Bevilacqua, Carlo Samori, Andrea L. Lacaita, Salvatore Levantino:
A 72-fs-Total-Integrated-Jitter Two-Core Fractional-N Digital PLL With Digital Period Averaging Calibration on Frequency Quadrupler and True-in-Phase Combiner. IEEE J. Solid State Circuits 58(3): 634-646 (2023)

a service of

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.