BibTeX record journals/jssc/ChangKSLKCKTWC14

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@article{DBLP:journals/jssc/ChangKSLKCKTWC14,
  author    = {Meng{-}Fan Chang and
               Chia{-}Chen Kuo and
               Shyh{-}Shyuan Sheu and
               Chorng{-}Jung Lin and
               Ya{-}Chin King and
               Frederick T. Chen and
               Tzu{-}Kun Ku and
               Ming{-}Jinn Tsai and
               Jui{-}Jen Wu and
               Yu{-}Der Chih},
  title     = {Area-Efficient Embedded Resistive {RAM} (ReRAM) Macros Using Logic-Process
               Vertical-Parasitic-BJT {(VPBJT)} Switches and Read-Disturb-Free Temperature-Aware
               Current-Mode Read Scheme},
  journal   = {{IEEE} J. Solid State Circuits},
  volume    = {49},
  number    = {4},
  pages     = {908--916},
  year      = {2014},
  url       = {https://doi.org/10.1109/JSSC.2013.2297417},
  doi       = {10.1109/JSSC.2013.2297417},
  timestamp = {Sun, 30 Aug 2020 00:12:41 +0200},
  biburl    = {https://dblp.org/rec/journals/jssc/ChangKSLKCKTWC14.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
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