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"80-kb Logic Embedded High-K Charge Trap Transistor-Based ..."

Balaji Jayaraman et al. (2018)

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DOI: 10.1109/JSSC.2017.2784760

access: closed

type: Journal Article

metadata version: 2022-10-02

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  - https://dblp.org/rec/journals/jssc/JayaramanLVCYGT18
Balaji Jayaraman, Derek Leu, Janakiraman Viraraghavan, Alberto Cestero, Ming Yin, John Golz, Rajesh Reddy Tummuru, Ramesh Raghavan, Dan Moy, Thejas Kempanna, Faraz Khan, Toshiaki Kirihata, Subramanian S. Iyer:
80-kb Logic Embedded High-K Charge Trap Transistor-Based Multi-Time-Programmable Memory With No Added Process Complexity. IEEE J. Solid State Circuits 53(3): 949-960 (2018)

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