"An 80-MOPS-peak high-speed and low-power-consumption 16-b digital signal ..."

Hideyuki Kabuo et al. (1996)

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DOI: 10.1109/4.499725

access: closed

type: Journal Article

metadata version: 2022-07-18

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Hideyuki Kabuo, Minoru Okamoto, Isao Tanaka, Hiroyuki Yasoshima, Shinichi Marui, Masayuki Yamasaki, Toshio Sugimura, Katsuhiko Ueda, Toshihlro Ishikawa, Hidetoshi Suzuki, Ryuichi Asahi:
An 80-MOPS-peak high-speed and low-power-consumption 16-b digital signal processor. IEEE J. Solid State Circuits 31(4): 494-503 (1996)

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