


default search action
"Highly parallel residue arithmetic chip based on multiple-valued ..."
Michitaka Kameyama, Tsutomu Sekibe, Tatsuo Higuchi (1989)
- Michitaka Kameyama, Tsutomu Sekibe, Tatsuo Higuchi:

Highly parallel residue arithmetic chip based on multiple-valued bidirectional current-mode logic. IEEE J. Solid State Circuits 24(5): 1404-1411 (1989)

manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.


Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCID













