Stop the war!

Остановите войну!

for scientists:

default search action

combined dblp search
author search
venue search
publication search

ask others

"A 256-Kb Dual-VCC SRAM Building Block in 65-nm CMOS Process ..."

Muhammad M. Khellah et al. (2007)

> Home

Details and statistics

DOI: 10.1109/JSSC.2006.888357

access: closed

type: Journal Article

metadata version: 2022-10-02

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/jssc/KhellahSYKHRSTB07
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/jssc/KhellahSYKHRSTB07
Muhammad M. Khellah, Dinesh Somasekhar, Yibin Ye, Nam-Sung Kim, Jason Howard, Gregory Ruhl, Murad Sunna, James W. Tschanz, Nitin Borkar, Fatih Hamzaoglu, Gunjan Pandya, Ali Farhang, Kevin Zhang, Vivek De:
A 256-Kb Dual-V_CC SRAM Building Block in 65-nm CMOS Process With Actively Clamped Sleep Transistor. IEEE J. Solid State Circuits 42(1): 233-242 (2007)

a service of

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.