"125-GHz Diode Frequency Doubler in 0.13-µm CMOS."

Chuying Mao et al. (2009)

> Home

Details and statistics

DOI: 10.1109/JSSC.2009.2016995

access: closed

type: Journal Article

metadata version: 2020-08-30

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/jssc/MaoNSSO09
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/jssc/MaoNSSO09
Chuying Mao, Chakravartula Shashank Nallani, Swaminathan Sankaran, Eunyoung Seok, Kenneth K. O:
125-GHz Diode Frequency Doubler in 0.13-µm CMOS. IEEE J. Solid State Circuits 44(5): 1531-1538 (2009)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.