"A highly integrated 40-MIPS (peak) 64-b RISC microprocessor."

Jito Miyake et al. (1990)

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DOI: 10.1109/4.62142

access: closed

type: Journal Article

metadata version: 2025-01-23

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Jito Miyake, Todhinoti Maeda, Yoshito Nishimichi, Johi Katsura, Takashi Taniguchi, Seihi Yamaguchi, Hisakazu Edamatsu, Shigeru Watari, Yoshiyuko Takagi, Kazuhiko Tsuji, Shigeo Kuninobu, Steve Cox, Douglas Duschatko, Douglas MacGregor:
A highly integrated 40-MIPS (peak) 64-b RISC microprocessor. IEEE J. Solid State Circuits 25(5): 1199-1206 (1990)

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