"A 400-MT/s 6.4-GB/s multiprocessor bus interface."

Harry Muljono et al. (2003)

> Home

Details and statistics

DOI: 10.1109/JSSC.2003.818295

access: closed

type: Journal Article

metadata version: 2022-04-20

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/jssc/MuljonoLTWAHAR03
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/jssc/MuljonoLTWAHAR03
Harry Muljono, Beom-Taek Lee, Yanmei (Kathy) Tian, Yanbin (Eddie) Wang, Mubeen Atha, Tiffany Huang, Mitsuhiro Adachi, Stefan Rusu:
A 400-MT/s 6.4-GB/s multiprocessor bus interface. IEEE J. Solid State Circuits 38(11): 1846-1856 (2003)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.