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"An 85 mW, 10 b, 40 Msample/s CMOS parallel-pipelined ADC."

Katsufumi Nakamura et al. (1995)

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DOI: 10.1109/4.364430

access: closed

type: Journal Article

metadata version: 2023-05-05

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  - https://dblp.org/rec/journals/jssc/NakamuraHCA95
Katsufumi Nakamura, Masso Hotta, L. Richard Carley, David J. Allstot:
An 85 mW, 10 b, 40 Msample/s CMOS parallel-pipelined ADC. IEEE J. Solid State Circuits 30(3): 173-183 (1995)

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