"Three-Dimensional 128 Gb MLC Vertical nand Flash Memory With 24-WL Stacked ..."

Ki-Tae Park et al. (2015)

> Home

Details and statistics

DOI: 10.1109/JSSC.2014.2352293

access: closed

type: Journal Article

metadata version: 2024-12-03

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/jssc/ParkNKKLCCKKKPSKPLYKSARKYKSBCHKCK15
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/jssc/ParkNKKLCCKKKPSKPLYKSARKYKSBCHKCK15
Ki-Tae Park, Sangwan Nam, Dae-Han Kim, Pansuk Kwak, Doosub Lee, Yoon-Hee Choi, Myung-Hoon Choi, Dong-Hun Kwak, Doo-Hyun Kim, Minsu Kim, Hyun Wook Park, Sang-Won Shim, Kyung-Min Kang, Sang-Won Park, Kangbin Lee, Hyun-Jun Yoon, Kuihan Ko, Dong-Kyo Shim, Yang-Lo Ahn, Jinho Ryu, Donghyun Kim, Kyunghwa Yun, Joonsoo Kwon, Seunghoon Shin, Dae-Seok Byeon, Kihwan Choi, Jin-Man Han, Kyehyun Kyung, Jeong-Hyuk Choi, Kinam Kim:
Three-Dimensional 128 Gb MLC Vertical nand Flash Memory With 24-WL Stacked Layers and 50 MB/s High-Speed Programming. IEEE J. Solid State Circuits 50(1): 204-213 (2015)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.