"An analog PLL-based clock and data recovery circuit with high input jitter ..."

Sam Yinshang Sun (1989)

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DOI: 10.1109/4.18592

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type: Journal Article

metadata version: 2024-11-12

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Sam Yinshang Sun:
An analog PLL-based clock and data recovery circuit with high input jitter tolerance. IEEE J. Solid State Circuits 24(2): 325-330 (1989)

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