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"Equalization and clock recovery for a 2.5-10-Gb/s 2-PAM/4-PAM backplane ..."

Jared L. Zerbe et al. (2003)

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DOI: 10.1109/JSSC.2003.818572

access: closed

type: Journal Article

metadata version: 2022-10-02

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Jared L. Zerbe, Carl W. Werner, Vladimir Stojanovic, Fred Chen, Jason Wei, Grace Tsang, Dennis Kim, William F. Stonecypher, Andrew Ho, Timothy P. Thrush, Ravi T. Kollipara, Mark A. Horowitz, Kevin S. Donnelly:
Equalization and clock recovery for a 2.5-10-Gb/s 2-PAM/4-PAM backplane transceiver cell. IEEE J. Solid State Circuits 38(12): 2121-2130 (2003)

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