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"Low-Power Design Approach of 11FO4 256-Kbyte Embedded SRAM for the ..."

Toru Asano et al. (2005)

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DOI: 10.1109/MM.2005.94

access: closed

type: Journal Article

metadata version: 2017-05-20

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  persistent URL:
  - https://dblp.org/rec/journals/micro/AsanoSDTWCNKY05
Toru Asano, Joel Silberman, Sang H. Dhong, Osamu Takahashi, Michael White, Scott R. Cottier, Takaaki Nakazato, Atsushi Kawasumi, Hiroshi Yoshihara:
Low-Power Design Approach of 11FO4 256-Kbyte Embedded SRAM for the Synergistic Processor Element of a Cell Processor. IEEE Micro 25(5): 30-38 (2005)

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