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"Design of RSA processor for concurrent cryptographic transformations."

Satyanarayana Vollala et al. (2017)

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DOI: 10.1016/J.MEJO.2017.03.009

access: closed

type: Journal Article

metadata version: 2020-07-20

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Satyanarayana Vollala, V. V. Varadhan, K. Geetha, N. Ramasubramanian:
Design of RSA processor for concurrent cryptographic transformations. Microelectron. J. 63: 112-122 (2017)

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