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"A fast processor for 3-d device simulation using systolic arrays."

Takashi Naritomi, Hirotomo Aso, Masayuki Kimura (1991)

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DOI: 10.1002/SCJ.4690220105

access: closed

type: Journal Article

metadata version: 2023-09-13

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  - journals/scjapan/NaritomiAK91
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  - https://dblp.org/rec/journals/scjapan/NaritomiAK91
Takashi Naritomi, Hirotomo Aso, Masayuki Kimura:
A fast processor for 3-d device simulation using systolic arrays. Syst. Comput. Jpn. 22(1): 39-48 (1991)

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