"Negative Design Margin Realization through Deep Path Activity Detection ..."

Run-Ze Yu et al. (2023)

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DOI: 10.3390/S23177498

access: open

type: Journal Article

metadata version: 2024-07-19

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Run-Ze Yu, Zhenhao Li, Xi Deng, Zhenglin Liu:
Negative Design Margin Realization through Deep Path Activity Detection Combined with Dynamic Voltage Scaling in a 55 nm Near-Threshold 32-Bit Microcontroller. Sensors 23(17): 7498 (2023)

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