"Design of Parity Testable Combinational Circuits."

Bhargab B. Bhattacharya, Sharad C. Seth (1989)

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DOI: 10.1109/12.42129

access: closed

type: Journal Article

metadata version: 2017-05-20

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Bhargab B. Bhattacharya, Sharad C. Seth:
Design of Parity Testable Combinational Circuits. IEEE Trans. Computers 38(11): 1580-1584 (1989)

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