"VLSI Computational Architectures for the Arithmetic Cosine Transform."

Nilanka T. Rajapaksha et al. (2015)

> Home

Details and statistics

DOI: 10.1109/TC.2014.2366732

access: closed

type: Journal Article

metadata version: 2023-11-12

- view
  authority control:
- export record
  dblp key:
  - journals/tc/RajapakshaMCAD15
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/tc/RajapakshaMCAD15
Nilanka T. Rajapaksha, Arjuna Madanayake, Renato J. Cintra, Jithra Adikari, Vassil S. Dimitrov:
VLSI Computational Architectures for the Arithmetic Cosine Transform. IEEE Trans. Computers 64(9): 2708-2715 (2015)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.