"Pipelined Decision Tree Classification Accelerator Implementation in FPGA ..."

Fareena Saqib et al. (2015)

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DOI: 10.1109/TC.2013.204

access: closed

type: Journal Article

metadata version: 2022-01-03

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Fareena Saqib, Aindrik Dutta, Jim Plusquellic, Philip Ortiz, Marios S. Pattichis:
Pipelined Decision Tree Classification Accelerator Implementation in FPGA (DT-CAIF). IEEE Trans. Computers 64(1): 280-285 (2015)

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