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"Sleep Transistor Sizing for Leakage Power Minimization Considering ..."

De-Shiuan Chiou et al. (2010)

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DOI: 10.1109/TCAD.2010.2046812

access: closed

type: Journal Article

metadata version: 2020-09-24

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De-Shiuan Chiou, Yu-Ting Chen, Da-Cheng Juan, Shih-Chieh Chang:
Sleep Transistor Sizing for Leakage Power Minimization Considering Temporal Correlation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 29(8): 1285-1289 (2010)

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