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"Threshold-Defined Logic and Interconnect for Protection Against Reverse ..."

Jae-Won Jang et al. (2020)

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DOI: 10.1109/TCAD.2018.2887056

access: closed

type: Journal Article

metadata version: 2020-09-24

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  - https://dblp.org/rec/journals/tcad/JangDVNGI20
Jae-Won Jang, Asmit De, Deepak Vontela, Ithihasa Reddy Nirmala, Swaroop Ghosh, Anirudh Iyengar:
Threshold-Defined Logic and Interconnect for Protection Against Reverse Engineering. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(2): 308-320 (2020)

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