"Zero skew clock-tree optimization with buffer insertion/sizing and wire ..."

Jeng-Liang Tsai, Tsung-Hao Chen, Charlie Chung-Ping Chen (2004)

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DOI: 10.1109/TCAD.2004.825875

access: closed

type: Journal Article

metadata version: 2020-09-24

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Jeng-Liang Tsai, Tsung-Hao Chen, Charlie Chung-Ping Chen:
Zero skew clock-tree optimization with buffer insertion/sizing and wire sizing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 23(4): 565-572 (2004)

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