"Automatic interconnection rectification for SoC design verification based ..."

Chun-Yao Wang, Shing-Wu Tung, Jing-Yang Jou (2003)

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DOI: 10.1109/TCAD.2002.805723

access: closed

type: Journal Article

metadata version: 2020-09-24

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Chun-Yao Wang, Shing-Wu Tung, Jing-Yang Jou:
Automatic interconnection rectification for SoC design verification based on the port order fault model. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 22(1): 104-114 (2003)

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