Stop the war!

Остановите войну!

for scientists:

default search action

combined dblp search
author search
venue search
publication search

ask others

"Voltage-Aware Chip-Level Design for Reliability-Driven Pin-Constrained ..."

Sheng-Han Yeh et al. (2014)

> Home

Details and statistics

DOI: 10.1109/TCAD.2014.2331340

access: closed

type: Journal Article

metadata version: 2020-09-24

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/tcad/YehCHYH14
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/tcad/YehCHYH14
Sheng-Han Yeh, Jia-Wen Chang, Tsung-Wei Huang, Shang-Tsung Yu, Tsung-Yi Ho:
Voltage-Aware Chip-Level Design for Reliability-Driven Pin-Constrained EWOD Chips. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33(9): 1302-1315 (2014)

a service of

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.