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"Area-Delay-Power Efficient VLSI Architecture of FIR Filter for Processing ..."

Sudipta Bose, Arijit De, Indrajit Chakrabarti (2021)

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DOI: 10.1109/TCSII.2021.3081257

access: closed

type: Journal Article

metadata version: 2021-11-03

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  - https://dblp.org/rec/journals/tcasII/BoseDC21
Sudipta Bose, Arijit De, Indrajit Chakrabarti:
Area-Delay-Power Efficient VLSI Architecture of FIR Filter for Processing Seismic Signal. IEEE Trans. Circuits Syst. II Express Briefs 68(11): 3451-3455 (2021)

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