"Analysis and Design of Reconfigurable Sense Amplifier for Compute SRAM ..."

Jian Chen et al. (2021)

> Home

Details and statistics

DOI: 10.1109/TCSII.2021.3123512

access: closed

type: Journal Article

metadata version: 2024-09-02

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/tcasII/ChenZWH21
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/tcasII/ChenZWH21
Jian Chen, Wenfeng Zhao, Yuqi Wang, Yajun Ha:
Analysis and Design of Reconfigurable Sense Amplifier for Compute SRAM With High-Speed Compute and Normal Read Access. IEEE Trans. Circuits Syst. II Express Briefs 68(12): 3503-3507 (2021)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.