


default search action
"Low-Latency Preprocessing Architecture for Residue Number System via ..."
Sin-Wei Chiu, Keshab K. Parhi (2024)
- Sin-Wei Chiu

, Keshab K. Parhi
:
Low-Latency Preprocessing Architecture for Residue Number System via Flexible Barrett Reduction for Homomorphic Encryption. IEEE Trans. Circuits Syst. II Express Briefs 71(5): 2784-2788 (2024)

manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.


Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCID













