"A 28nm 8Kb Reconfigurable SRAM Computing-In-Memory Macro With ..."

Kanglin Xiao et al. (2024)

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DOI: 10.1109/TCSII.2024.3360284

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type: Journal Article

metadata version: 2024-07-19

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Kanglin Xiao, Xin Qiao, Xiaoxin Cui, Jiahao Song, Haoyang Luo, Xin'an Wang, Yuan Wang:
A 28nm 8Kb Reconfigurable SRAM Computing-In-Memory Macro With Input-Sparsity Optimized DTC for Multi-Mode MAC Operations. IEEE Trans. Circuits Syst. II Express Briefs 71(7): 3263-3267 (2024)

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