"Parallel Pipelined Architecture and Algorithm for Matrix Transposition ..."

Bo Zhang, Zhenguo Ma, Wei Luo (2022)

> Home

Details and statistics

DOI: 10.1109/TCSII.2021.3134710

access: closed

type: Journal Article

metadata version: 2022-11-18

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/tcasII/ZhangML22
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/tcasII/ZhangML22
Bo Zhang, Zhenguo Ma, Wei Luo:
Parallel Pipelined Architecture and Algorithm for Matrix Transposition Using Registers. IEEE Trans. Circuits Syst. II Express Briefs 69(3): 1627-1631 (2022)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.