"On-Chip Memory Optimization Scheme for VLSI Implementation of Line-Based ..."

Chih-Chi Cheng et al. (2007)

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DOI: 10.1109/TCSVT.2007.897106

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type: Journal Article

metadata version: 2020-08-25

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Chih-Chi Cheng, Chao-Tsung Huang, Ching-Yeh Chen, Chung-Jr Lian, Liang-Gee Chen:
On-Chip Memory Optimization Scheme for VLSI Implementation of Line-Based Two-Dimentional Discrete Wavelet Transform. IEEE Trans. Circuits Syst. Video Technol. 17(7): 814-822 (2007)

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