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"An On-Chip Signal Suppression Countermeasure to Power Analysis Attacks."

Girish B. Ratanpal, Ronald D. Williams, Travis N. Blalock (2004)

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DOI: 10.1109/TDSC.2004.25

access: closed

type: Journal Article

metadata version: 2020-04-09

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  dblp key:
  - journals/tdsc/RatanpalWB04
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  persistent URL:
  - https://dblp.org/rec/journals/tdsc/RatanpalWB04
Girish B. Ratanpal, Ronald D. Williams, Travis N. Blalock:
An On-Chip Signal Suppression Countermeasure to Power Analysis Attacks. IEEE Trans. Dependable Secur. Comput. 1(3): 179-189 (2004)

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