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"Time-to-Digital Converter Using a Tuned-Delay Line Evaluated in 28-, 40-, ..."
Jun Yeon Won, Jae Sung Lee (2016)
- Jun Yeon Won

, Jae Sung Lee:
Time-to-Digital Converter Using a Tuned-Delay Line Evaluated in 28-, 40-, and 45-nm FPGAs. IEEE Trans. Instrum. Meas. 65(7): 1678-1689 (2016)

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