"Runtime Programmable and Memory Bandwidth Optimized FPGA-Based Coprocessor ..."

Nimish Shah, Paragkumar Chaudhari, Kuruvilla Varghese (2018)

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DOI: 10.1109/TNNLS.2018.2815085

access: closed

type: Journal Article

metadata version: 2020-05-30

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Nimish Shah, Paragkumar Chaudhari, Kuruvilla Varghese:
Runtime Programmable and Memory Bandwidth Optimized FPGA-Based Coprocessor for Deep Convolutional Neural Network. IEEE Trans. Neural Networks Learn. Syst. 29(12): 5922-5934 (2018)

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