"A Novel TriNet Architecture for Enhanced Analog IC Design Automation."

Arunkumar P. Chavan et al. (2024)

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DOI: 10.1109/TVLSI.2024.3452032

access: open

type: Journal Article

metadata version: 2024-12-09

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Arunkumar P. Chavan, Shrish Shrinath Vaidya, Sanket M. Mantrashetti, Abhishek Gurunath Dastikopp, Kishan S. Murthy, H. V. Ravish Aradhya, Prakash Pawar:
A Novel TriNet Architecture for Enhanced Analog IC Design Automation. IEEE Trans. Very Large Scale Integr. Syst. 32(11): 2046-2059 (2024)

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