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"High-speed VLSI architecture for parallel Reed-Solomon decoder."

Hanho Lee (2003)

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DOI: 10.1109/TVLSI.2003.810782

access: closed

type: Journal Article

metadata version: 2020-03-11

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Hanho Lee:
High-speed VLSI architecture for parallel Reed-Solomon decoder. IEEE Trans. Very Large Scale Integr. Syst. 11(2): 288-294 (2003)

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