![](https://dblp.dagstuhl.de/img/logo.ua.320x120.png)
![](https://dblp.dagstuhl.de/img/dropdown.dark.16x16.png)
![](https://dblp.dagstuhl.de/img/peace.dark.16x16.png)
Остановите войну!
for scientists:
![search dblp search dblp](https://dblp.dagstuhl.de/img/search.dark.16x16.png)
![search dblp](https://dblp.dagstuhl.de/img/search.dark.16x16.png)
default search action
"A 28-nm CMOS 7-GS/s 6-bit DAC With DfT Clock and Memory Reaching SFDR ..."
Georgi I. Radulov, Patrick J. Quinn, Arthur H. M. van Roermund (2015)
- Georgi I. Radulov, Patrick J. Quinn, Arthur H. M. van Roermund:
A 28-nm CMOS 7-GS/s 6-bit DAC With DfT Clock and Memory Reaching SFDR >50 dB Up to 1 GHz. IEEE Trans. Very Large Scale Integr. Syst. 23(9): 1941-1945 (2015)
![](https://dblp.dagstuhl.de/img/cog.dark.24x24.png)
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.