"An STM-16 Frame Termination VLSI With 2.5-Gb/s/Pin Input/Output Buffers: ..."

Nobutaro Shibata et al. (2015)

> Home

Details and statistics

DOI: 10.1109/TVLSI.2014.2333589

access: closed

type: Journal Article

metadata version: 2020-03-11

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/tvlsi/ShibataONS15
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/tvlsi/ShibataONS15
Nobutaro Shibata, Yusuke Ohtomo, Mika Nishisaka, Yasuhiro Sato:
An STM-16 Frame Termination VLSI With 2.5-Gb/s/Pin Input/Output Buffers: High-Speed and Low-Power Multi-𝕍_DD CMOS/SIMOX Techniques. IEEE Trans. Very Large Scale Integr. Syst. 23(6): 1089-1102 (2015)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.