"iEDCL: Streamlined, False-Error-Free Error Detection and Correction Scheme ..."

Runze Yu et al. (2024)

> Home

Details and statistics

DOI: 10.1109/TVLSI.2024.3409315

access: closed

type: Journal Article

metadata version: 2024-08-22

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/tvlsi/YuLDWJZL24
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/tvlsi/YuLDWJZL24
Runze Yu, Zhenhao Li, Xi Deng, Zhaoxu Wang, Wei Jia, Haoming Zhang, Zhenglin Liu:
iEDCL: Streamlined, False-Error-Free Error Detection and Correction Scheme in a Near-Threshold Enabled 32-bit Processor. IEEE Trans. Very Large Scale Integr. Syst. 32(8): 1436-1446 (2024)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.