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"A 3-D Cache With Ultra-Wide Data Bus for 3-D Processor-Memory Integration."

Aamir Zia et al. (2010)

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DOI: 10.1109/TVLSI.2009.2017750

access: closed

type: Journal Article

metadata version: 2024-02-29

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  - https://dblp.org/rec/journals/tvlsi/ZiaJKCKM10
Aamir Zia, Philip Jacob, Jin Woo Kim, Michael Chu, Russell P. Kraft, John F. McDonald:
A 3-D Cache With Ultra-Wide Data Bus for 3-D Processor-Memory Integration. IEEE Trans. Very Large Scale Integr. Syst. 18(6): 967-977 (2010)

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