"A Fast Algorithm-Based Cost-Effective and Hardware-Efficient Unified ..."

Chia-Wei Chang et al. (2016)

> Home

Details and statistics

DOI: 10.1007/S11265-015-0982-8

access: closed

type: Journal Article

metadata version: 2022-04-09

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/vlsisp/ChangHFWC16
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/vlsisp/ChangHFWC16
Chia-Wei Chang, Hao-Fan Hsu, Chih-Peng Fan, Chung-Bin Wu, Robert Chen-Hao Chang:
A Fast Algorithm-Based Cost-Effective and Hardware-Efficient Unified Architecture Design of 4 × 4, 8 × 8, 16 × 16, and 32 × 32 Inverse Core Transforms for HEVC. J. Signal Process. Syst. 82(1): 69-89 (2016)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.