"Power Reduction Technique in Coefficient Multiplications Through ..."

Sangjin Hong et al. (2004)

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DOI: 10.1023/B:VLSI.0000040423.95673.2D

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type: Journal Article

metadata version: 2025-03-17

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Sangjin Hong, Shu-Shin Chin, Suhwan Kim, Wei Hwang:
Power Reduction Technique in Coefficient Multiplications Through Multiplier Characterization. J. VLSI Signal Process. 38(2): 101-113 (2004)

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