


default search action
"Design of High Performance 8 bit Multiplier using Vedic Multiplication ..."
- D. Kayal, Posiba Mostafa, Anup Dandapat

, Chandan Kumar Sarkar:
Design of High Performance 8 bit Multiplier using Vedic Multiplication Algorithm with McCMOS Technique. J. Signal Process. Syst. 76(1): 1-9 (2014)

manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.


Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCID













