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ORCID"Reducing Data Hazards on Multi-pipelined DSP Architecture with Loop ..."
Sissades Tongsima et al. (1998)
- Sissades Tongsima, Chantana Chantrapornchai, Edwin Hsing-Mean Sha, Nelson L. Passos:
Reducing Data Hazards on Multi-pipelined DSP Architecture with Loop Scheduling. J. VLSI Signal Process. 18(2): 111-123 (1998)
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