:facetid:toc:\"db/conf/glvlsi/glvlsi2008.bht\"OK:facetid:toc:db/conf/glvlsi/glvlsi2008.bhtHamed AbrishamiSafar HatamiBehnam AmelifardMassoud PedramNBTI-aware flip-flop characterization and design.ACM Great Lakes Symposium on VLSI29-342008Conference and Workshop Papersclosedconf/glvlsi/AbrishamiHAP0810.1145/1366110.1366121https://doi.org/10.1145/1366110.1366121https://dblp.org/rec/conf/glvlsi/AbrishamiHAP08URL#5352637Andrea AcquavivaFranco FummiGiovanni PerbelliniDavide QuagliaAn energy-aware co-simulation framework for the design of wireless sensor networks.ACM Great Lakes Symposium on VLSI375-3782008Conference and Workshop Papersclosedconf/glvlsi/AcquavivaFPQ0810.1145/1366110.1366199https://doi.org/10.1145/1366110.1366199https://dblp.org/rec/conf/glvlsi/AcquavivaFPQ08URL#5352638Charbel J. AklMagdy A. BayoumiAssumers for high-speed single and multi-cycle on-chip interconnect with low repeater count.ACM Great Lakes Symposium on VLSI327-3322008Conference and Workshop Papersclosedconf/glvlsi/AklB0810.1145/1366110.1366187https://doi.org/10.1145/1366110.1366187https://dblp.org/rec/conf/glvlsi/AklB08URL#5352639Syed M. AlamMike IgnatowskiYuan Xie 0001Technology, CAD tools, and designs for emerging 3D integration technology.ACM Great Lakes Symposium on VLSI1-22008Conference and Workshop Papersclosedconf/glvlsi/AlamIX0810.1145/1366110.1366112https://doi.org/10.1145/1366110.1366112https://dblp.org/rec/conf/glvlsi/AlamIX08URL#5352640Gian Nicola AngotziMassimo BarbaroPaul G. A. JespersComparison of redundant architectures for two-step ADCs.ACM Great Lakes Symposium on VLSI445-4502008Conference and Workshop Papersclosedconf/glvlsi/AngotziBJ0810.1145/1366110.1366216https://doi.org/10.1145/1366110.1366216https://dblp.org/rec/conf/glvlsi/AngotziBJ08URL#5352641Venkatesh ArunachalamWayne P. BurlesonLow-power clock distribution in a multilayer core 3d microprocessor.ACM Great Lakes Symposium on VLSI429-4342008Conference and Workshop Papersclosedconf/glvlsi/ArunachalamB0810.1145/1366110.1366212https://doi.org/10.1145/1366110.1366212https://dblp.org/rec/conf/glvlsi/ArunachalamB08URL#5352642Andrey AyupovAlexander MarchenkoVladimir TiourinAn analytical approach to placement legalization.ACM Great Lakes Symposium on VLSI167-1702008Conference and Workshop Papersclosedconf/glvlsi/AyupovMT0810.1145/1366110.1366152https://doi.org/10.1145/1366110.1366152https://dblp.org/rec/conf/glvlsi/AyupovMT08URL#5352643Mainak BangaMaheshwar ChandrasekarLei Fang 0002Michael S. HsiaoGuided test generation for isolation and detection of embedded trojans in ics.ACM Great Lakes Symposium on VLSI363-3662008Conference and Workshop Papersclosedconf/glvlsi/BangaCFH0810.1145/1366110.1366196https://doi.org/10.1145/1366110.1366196https://dblp.org/rec/conf/glvlsi/BangaCFH08URL#5352644Kanad BasuPrabhat Mishra 0001A novel test-data compression technique using application-aware bitmask and dictionary selection methods.ACM Great Lakes Symposium on VLSI83-882008Conference and Workshop Papersclosedconf/glvlsi/BasuM0810.1145/1366110.1366132https://doi.org/10.1145/1366110.1366132https://dblp.org/rec/conf/glvlsi/BasuM08URL#5352645Dimitris BekiarisKiamal Z. PekmestziChristos A. PapachristouA high-speed radix-4 multiplexer-based array multiplier.ACM Great Lakes Symposium on VLSI115-1182008Conference and Workshop Papersclosedconf/glvlsi/BekiarisPP0810.1145/1366110.1366139https://doi.org/10.1145/1366110.1366139https://dblp.org/rec/conf/glvlsi/BekiarisPP08URL#5352646Koustav BhattacharyaNagarajan RanganathanA linear programming formulation for security-aware gate sizing.ACM Great Lakes Symposium on VLSI273-2782008Conference and Workshop Papersclosedconf/glvlsi/BhattacharyaR0810.1145/1366110.1366176https://doi.org/10.1145/1366110.1366176https://dblp.org/rec/conf/glvlsi/BhattacharyaR08URL#5352647Mayur BubnaSudip Roy 0002Naresh ShenoySubhra Mazumdar 0002A layout-aware physical design method for constructing feasible QCA circuits.ACM Great Lakes Symposium on VLSI243-2482008Conference and Workshop Papersclosedconf/glvlsi/BubnaRSM0810.1145/1366110.1366170https://doi.org/10.1145/1366110.1366170https://dblp.org/rec/conf/glvlsi/BubnaRSM08URL#5352648Mark M. BudnikEric W. JohnsonJoshua D. WoodElectrical models for vertical carbon nanotube capacitors.ACM Great Lakes Symposium on VLSI367-3702008Conference and Workshop Papersclosedconf/glvlsi/BudnikJW0810.1145/1366110.1366197https://doi.org/10.1145/1366110.1366197https://dblp.org/rec/conf/glvlsi/BudnikJW08URL#5352649Paulo F. ButzenLeomar S. da Rosa Jr.Erasmo J. D. Chiappetta FilhoDionatan S. MouraAndré Inácio ReisRenato P. RibasSimple and accurate method for fast static currentestimation in cmos complex gates with interaction ofleakage mechanisms.ACM Great Lakes Symposium on VLSI407-4102008Conference and Workshop Papersclosedconf/glvlsi/ButzenRFMRR0810.1145/1366110.1366207https://doi.org/10.1145/1366110.1366207https://dblp.org/rec/conf/glvlsi/ButzenRFMRR08URL#5352650Andrea CalimeraEnrico MaciiMassimo PoncinoR. Iris BaharTemperature-insensitive synthesis using multi-vt libraries.ACM Great Lakes Symposium on VLSI5-102008Conference and Workshop Papersclosedconf/glvlsi/CalimeraMPB0810.1145/1366110.1366116https://doi.org/10.1145/1366110.1366116https://dblp.org/rec/conf/glvlsi/CalimeraMPB08URL#5352651Ivan D. CastellanosJames E. StineCompressor trees for decimal partial product reduction.ACM Great Lakes Symposium on VLSI107-1102008Conference and Workshop Papersclosedconf/glvlsi/CastellanosS0810.1145/1366110.1366137https://doi.org/10.1145/1366110.1366137https://dblp.org/rec/conf/glvlsi/CastellanosS08URL#5352652Yen-Jen ChangExploiting frequent opcode locality for power efficient instruction cache.ACM Great Lakes Symposium on VLSI399-4022008Conference and Workshop Papersclosedconf/glvlsi/Chang0810.1145/1366110.1366205https://doi.org/10.1145/1366110.1366205https://dblp.org/rec/conf/glvlsi/Chang08URL#5352653Mingsong ChenPrabhat Mishra 0001Dhrubajyoti KalitaCoverage-driven automatic test generation for uml activity diagrams.ACM Great Lakes Symposium on VLSI139-1422008Conference and Workshop Papersclosedconf/glvlsi/ChenMK0810.1145/1366110.1366145https://doi.org/10.1145/1366110.1366145https://dblp.org/rec/conf/glvlsi/ChenMK08URL#5352654Ambrose ChuScott MillerMihai SimaReconfigurable solutions for very-long arithmetic with applications in cryptography.ACM Great Lakes Symposium on VLSI59-642008Conference and Workshop Papersclosedconf/glvlsi/ChuMS0810.1145/1366110.1366127https://doi.org/10.1145/1366110.1366127https://dblp.org/rec/conf/glvlsi/ChuMS08URL#5352655Jian CuiGengsheng ChenRuijing ShenSheldon X.-D. TanWenjian YuJiarong TongVariational capacitance modeling using orthogonal polynomial method.ACM Great Lakes Symposium on VLSI23-282008Conference and Workshop Papersclosedconf/glvlsi/CuiCSTYT0810.1145/1366110.1366119https://doi.org/10.1145/1366110.1366119https://dblp.org/rec/conf/glvlsi/CuiCSTYT08URL#5352656Zhiqiang CuiZhongfeng Wang 0001Extended layered decoding of LDPC codes.ACM Great Lakes Symposium on VLSI457-4622008Conference and Workshop Papersclosedconf/glvlsi/CuiW0810.1145/1366110.1366218https://doi.org/10.1145/1366110.1366218https://dblp.org/rec/conf/glvlsi/CuiW08URL#5352657Basab DattaWayne P. BurlesonCollaborative sensing of on-chip wire temperatures using interconnect based ring oscillators.ACM Great Lakes Symposium on VLSI41-462008Conference and Workshop Papersclosedconf/glvlsi/DattaB0810.1145/1366110.1366123https://doi.org/10.1145/1366110.1366123https://dblp.org/rec/conf/glvlsi/DattaB08URL#5352658Karthik DuraisamiEnrico MaciiMassimo PoncinoEnergy efficiency bounds of pulse-encoded buses.ACM Great Lakes Symposium on VLSI183-1882008Conference and Workshop Papersclosedconf/glvlsi/DuraisamiMP0810.1145/1366110.1366156https://doi.org/10.1145/1366110.1366156https://dblp.org/rec/conf/glvlsi/DuraisamiMP08URL#5352659Cesare FerriAmber ViescasTali MoreshetR. Iris BaharMaurice HerlihyEnergy efficient synchronization techniques for embedded architectures.ACM Great Lakes Symposium on VLSI435-4402008Conference and Workshop Papersclosedconf/glvlsi/FerriVMBH0810.1145/1366110.1366213https://doi.org/10.1145/1366110.1366213https://dblp.org/rec/conf/glvlsi/FerriVMBH08URL#5352660Dhruva GhaiSaraju P. MohantyElias KougianosA process and supply variation tolerant nano-CMOS low voltage, high speed, a/d converter for system-on-chip.ACM Great Lakes Symposium on VLSI47-522008Conference and Workshop Papersclosedconf/glvlsi/GhaiMK0810.1145/1366110.1366124https://doi.org/10.1145/1366110.1366124https://dblp.org/rec/conf/glvlsi/GhaiMK08URL#5352661Santosh GhoshMonjur AlamDipanwita Roy ChowdhuryIndranil Sengupta 0001A GF(p) elliptic curve group operator resistant against side channel attacks.ACM Great Lakes Symposium on VLSI53-582008Conference and Workshop Papersclosedconf/glvlsi/GhoshACS0810.1145/1366110.1366126https://doi.org/10.1145/1366110.1366126https://dblp.org/rec/conf/glvlsi/GhoshACS08URL#5352662Salman GopalaniRajesh GargSunil P. KhatriMosong ChengA lithography-friendly structured ASIC design approach.ACM Great Lakes Symposium on VLSI315-3202008Conference and Workshop Papersclosedconf/glvlsi/GopalaniGKC0810.1145/1366110.1366185https://doi.org/10.1145/1366110.1366185https://dblp.org/rec/conf/glvlsi/GopalaniGKC08URL#5352663Ann Gordon-RossJeremy LauBrad CalderPhase-based cache reconfiguration for a highly-configurable two-level cache hierarchy.ACM Great Lakes Symposium on VLSI379-3822008Conference and Workshop Papersclosedconf/glvlsi/Gordon-RossLC0810.1145/1366110.1366200https://doi.org/10.1145/1366110.1366200https://dblp.org/rec/conf/glvlsi/Gordon-RossLC08URL#5352664Maziar GoudarziTohru IshiharaInstruction cache leakage reduction by changing register operands and using asymmetric sram cells.ACM Great Lakes Symposium on VLSI383-3862008Conference and Workshop Papersclosedconf/glvlsi/GoudarziI0810.1145/1366110.1366201https://doi.org/10.1145/1366110.1366201https://dblp.org/rec/conf/glvlsi/GoudarziI08URL#5352665Mark R. GreenstreetSuwen YangVerifying start-up conditions for a ring oscillator.ACM Great Lakes Symposium on VLSI201-2062008Conference and Workshop Papersclosedconf/glvlsi/GreenstreetY0810.1145/1366110.1366160https://doi.org/10.1145/1366110.1366160https://dblp.org/rec/conf/glvlsi/GreenstreetY08URL#5352666Kanupriya GulatiSunil P. KhatriImproving FPGA routability using network coding.ACM Great Lakes Symposium on VLSI147-1502008Conference and Workshop Papersclosedconf/glvlsi/GulatiK0810.1145/1366110.1366147https://doi.org/10.1145/1366110.1366147https://dblp.org/rec/conf/glvlsi/GulatiK08URL#5352667Liangpeng GuoYici CaiQiang Zhou 0001Le KangXianlong HongA novel performance driven power gating based on distributed sleep transistor network.ACM Great Lakes Symposium on VLSI255-2602008Conference and Workshop Papersclosedconf/glvlsi/GuoCZKH0810.1145/1366110.1366173https://doi.org/10.1145/1366110.1366173https://dblp.org/rec/conf/glvlsi/GuoCZKH08URL#5352668Jin Guo 0001Antonis PapanikolaouMichele StucchiKristof CroesZsolt TokeiFrancky CatthoorA tool flow for predicting system level timing failures due to interconnect reliability degradation.ACM Great Lakes Symposium on VLSI291-2962008Conference and Workshop Papersclosedconf/glvlsi/GuoPSCTC0810.1145/1366110.1366180https://doi.org/10.1145/1366110.1366180https://dblp.org/rec/conf/glvlsi/GuoPSCTC08URL#5352669Sankar GurumurthyRamtilak VemuJacob A. AbrahamSuriyaprakash NatarajanOn efficient generation of instruction sequences to test for delay defects in a processor.ACM Great Lakes Symposium on VLSI279-2842008Conference and Workshop Papersclosedconf/glvlsi/GurumurthyVAN0810.1145/1366110.1366178https://doi.org/10.1145/1366110.1366178https://dblp.org/rec/conf/glvlsi/GurumurthyVAN08URL#5352670Koichi HamamotoHiroshi FuketaMasanori HashimotoYukio MitsuyamaTakao OnoyeExperimental study on body-biasing layout style-- negligible area overhead enables sufficient speed controllability --.ACM Great Lakes Symposium on VLSI387-3902008Conference and Workshop Papersclosedconf/glvlsi/HamamotoFHMO0810.1145/1366110.1366202https://doi.org/10.1145/1366110.1366202https://dblp.org/rec/conf/glvlsi/HamamotoFHMO08URL#5352671Safar HatamiHamed AbrishamiMassoud PedramStatistical timing analysis of flip-flops considering codependent setup and hold times.ACM Great Lakes Symposium on VLSI101-1062008Conference and Workshop Papersclosedconf/glvlsi/HatamiAP0810.1145/1366110.1366135https://doi.org/10.1145/1366110.1366135https://dblp.org/rec/conf/glvlsi/HatamiAP08URL#5352672Matthew Seetharam A. HoltzSeetharam NarasimhanSwarup BhuniaOn-die CMOS voltage droop detection and dynamiccompensation.ACM Great Lakes Symposium on VLSI35-402008Conference and Workshop Papersclosedconf/glvlsi/HoltzNB0810.1145/1366110.1366122https://doi.org/10.1145/1366110.1366122https://dblp.org/rec/conf/glvlsi/HoltzNB08URL#5352673Wen JiYuta AbeTakeshi IkenagaSatoshi GotoA cost-efficient partially-parallel irregular LDPC decoder based on sum-delta message passing algorithm.ACM Great Lakes Symposium on VLSI207-2122008Conference and Workshop Papersclosedconf/glvlsi/JiAIG0810.1145/1366110.1366161https://doi.org/10.1145/1366110.1366161https://dblp.org/rec/conf/glvlsi/JiAIG08URL#5352674Chanyang JooSoojae KimKwangsub YoonA low-power 12-bit 80MHz CMOS DAC using pseudo-segmentation.ACM Great Lakes Symposium on VLSI219-2222008Conference and Workshop Papersclosedconf/glvlsi/JooKY0810.1145/1366110.1366163https://doi.org/10.1145/1366110.1366163https://dblp.org/rec/conf/glvlsi/JooKY08URL#5352675Youngsik KimNazanin MansouriAutomated formal verification of scheduling with speculative code motions.ACM Great Lakes Symposium on VLSI95-1002008Conference and Workshop Papersclosedconf/glvlsi/KimM0810.1145/1366110.1366134https://doi.org/10.1145/1366110.1366134https://dblp.org/rec/conf/glvlsi/KimM08URL#5352676Yarallah KoolivandSeyed Morteza AlaviOmid ShoaeiNew technique in design of active rf cmos mixers for low flicker noise and high conversion gain.ACM Great Lakes Symposium on VLSI127-1302008Conference and Workshop Papersclosedconf/glvlsi/KoolivandAS0810.1145/1366110.1366142https://doi.org/10.1145/1366110.1366142https://dblp.org/rec/conf/glvlsi/KoolivandAS08URL#5352677Santanu KunduSantanu ChattopadhyayMesh-of-tree deterministic routing for network-on-chip architecture.ACM Great Lakes Symposium on VLSI343-3462008Conference and Workshop Papersclosedconf/glvlsi/KunduC0810.1145/1366110.1366191https://doi.org/10.1145/1366110.1366191https://dblp.org/rec/conf/glvlsi/KunduC08URL#5352678Jaeyong LeeSungil ChoKwangsub Yoon12bits 40mhz pipelined ADC with duty-correction circuit.ACM Great Lakes Symposium on VLSI441-4442008Conference and Workshop Papersclosedconf/glvlsi/LeeCY0810.1145/1366110.1366215https://doi.org/10.1145/1366110.1366215https://dblp.org/rec/conf/glvlsi/LeeCY08URL#5352679Mu-Shun Matt LeeChin-Hsun LinChien-Nan Jimmy LiuShih-Che LinQuick supply current waveform estimation at gate level using existed cell library information.ACM Great Lakes Symposium on VLSI135-1382008Conference and Workshop Papersclosedconf/glvlsi/LeeLLL0810.1145/1366110.1366144https://doi.org/10.1145/1366110.1366144https://dblp.org/rec/conf/glvlsi/LeeLLL08URL#5352680Hao LiYue ZhuoCriticality history guided FPGA placement algorithm for timing optimization.ACM Great Lakes Symposium on VLSI267-2722008Conference and Workshop Papersclosedconf/glvlsi/LiZ0810.1145/1366110.1366175https://doi.org/10.1145/1366110.1366175https://dblp.org/rec/conf/glvlsi/LiZ08URL#5352681Sheng Lin 0006Yong-Bin KimFabrizio LombardiA low leakage 9t sram cell for ultra-low power operation.ACM Great Lakes Symposium on VLSI123-1262008Conference and Workshop Papersclosedconf/glvlsi/LinKL0810.1145/1366110.1366141https://doi.org/10.1145/1366110.1366141https://dblp.org/rec/conf/glvlsi/LinKL08URL#5352682Andrew C. LingJianwen ZhuStephen Dean BrownDelay driven AIG restructuring using slack budget management.ACM Great Lakes Symposium on VLSI163-1662008Conference and Workshop Papersclosedconf/glvlsi/LingZB0810.1145/1366110.1366151https://doi.org/10.1145/1366110.1366151https://dblp.org/rec/conf/glvlsi/LingZB08URL#5352683Renfei LiuKeshab K. ParhiFast composite field S-box architectures for advanced encryption standard.ACM Great Lakes Symposium on VLSI65-702008Conference and Workshop Papersclosedconf/glvlsi/LiuP0810.1145/1366110.1366128https://doi.org/10.1145/1366110.1366128https://dblp.org/rec/conf/glvlsi/LiuP08URL#5352684Shaobo LiuQinru QiuQing Wu 0002Full-chip leakage current estimation based on statistical sampling techniques.ACM Great Lakes Symposium on VLSI391-3942008Conference and Workshop Papersclosedconf/glvlsi/LiuQW0810.1145/1366110.1366203https://doi.org/10.1145/1366110.1366203https://dblp.org/rec/conf/glvlsi/LiuQW08URL#5352685Pu LiuSheldon X.-D. TanWei Wu 0024Murli TirumalaFEKIS: a fast architecture-level thermal analyzer for online thermal regulation.ACM Great Lakes Symposium on VLSI411-4162008Conference and Workshop Papersclosedconf/glvlsi/LiuTWT0810.1145/1366110.1366209https://doi.org/10.1145/1366110.1366209https://dblp.org/rec/conf/glvlsi/LiuTWT08URL#5352686Yufeng LuErdal OrukluJafar SaniieFpga-based hardware/software co-design for chirplet signal decomposition.ACM Great Lakes Symposium on VLSI347-3502008Conference and Workshop Papersclosedconf/glvlsi/LuOS0810.1145/1366110.1366192https://doi.org/10.1145/1366110.1366192https://dblp.org/rec/conf/glvlsi/LuOS08URL#5352687Harika ManemPeter C. PaliwodaGarrett S. RoseA hybrid cmos/nano fpga architecture built fromprogrammable majority logic arrays.ACM Great Lakes Symposium on VLSI249-2542008Conference and Workshop Papersclosedconf/glvlsi/ManemPR0810.1145/1366110.1366171https://doi.org/10.1145/1366110.1366171https://dblp.org/rec/conf/glvlsi/ManemPR08URL#5352688Prasanth MangalagiriKarthik SarpatwariAditya YanamandraVijaykrishnan NarayananYuan Xie 0001Mary Jane IrwinOsama Awadel KarimA low-power phase change memory based hybrid cache architecture.ACM Great Lakes Symposium on VLSI395-3982008Conference and Workshop Papersclosedconf/glvlsi/MangalagiriSYNXIK0810.1145/1366110.1366204https://doi.org/10.1145/1366110.1366204https://dblp.org/rec/conf/glvlsi/MangalagiriSYNXIK08URL#5352689Zied MarrakchiHayder MrabetEmna AmouriHabib MehrezEfficient tree topology for FPGA interconnect network.ACM Great Lakes Symposium on VLSI321-3262008Conference and Workshop Papersclosedconf/glvlsi/MarrakchiMAM0810.1145/1366110.1366186https://doi.org/10.1145/1366110.1366186https://dblp.org/rec/conf/glvlsi/MarrakchiMAM08URL#5352690Tadayuki MatsumuraTohru IshiharaHiroto YasuuraSimultaneous optimization of memory configuration and code allocation for low power embedded systems.ACM Great Lakes Symposium on VLSI403-4062008Conference and Workshop Papersclosedconf/glvlsi/MatsumuraIY0810.1145/1366110.1366206https://doi.org/10.1145/1366110.1366206https://dblp.org/rec/conf/glvlsi/MatsumuraIY08URL#5352691Hamid NejatiTamer RaghebYehia MassoudOn the design of customizable low-voltage common-gate LNA-mixer pair using current and charge reusing techniques.ACM Great Lakes Symposium on VLSI195-2002008Conference and Workshop Papersclosedconf/glvlsi/NejatiRM0810.1145/1366110.1366159https://doi.org/10.1145/1366110.1366159https://dblp.org/rec/conf/glvlsi/NejatiRM08URL#5352692Drew C. NessDavid J. LiljaStatistically translating low-level error probabilities to increase the accuracy and efficiency of reliability simulations in hardware description languages.ACM Great Lakes Symposium on VLSI297-3022008Conference and Workshop Papersclosedconf/glvlsi/NessL0810.1145/1366110.1366181https://doi.org/10.1145/1366110.1366181https://dblp.org/rec/conf/glvlsi/NessL08URL#5352693Arthur NieuwoudtJamil KawaYehia MassoudImpact of dummy filling techniques on interconnect capacitance and planarization in nano-scale process technology.ACM Great Lakes Symposium on VLSI151-1542008Conference and Workshop Papersclosedconf/glvlsi/NieuwoudtKM0810.1145/1366110.1366148https://doi.org/10.1145/1366110.1366148https://dblp.org/rec/conf/glvlsi/NieuwoudtKM08URL#5352694Tak H. NingGLSVLSI 2008 invited/keynote talk.ACM Great Lakes Symposium on VLSI3-42008Conference and Workshop Papersclosedconf/glvlsi/Ning0810.1145/1366110.1366114https://doi.org/10.1145/1366110.1366114https://dblp.org/rec/conf/glvlsi/Ning08URL#5352695Daesun OhKeshab K. ParhiNonuniformly quantized min-sum decoder architecture for low-density parity-check codes.ACM Great Lakes Symposium on VLSI451-4562008Conference and Workshop Papersclosedconf/glvlsi/OhP0810.1145/1366110.1366217https://doi.org/10.1145/1366110.1366217https://dblp.org/rec/conf/glvlsi/OhP08URL#5352696Ernesto Ordoñez-CardenasRené de Jesús Romero-TroncosoMlp neural network and on-line backpropagation learning implementation in a low-cost fpga.ACM Great Lakes Symposium on VLSI333-3382008Conference and Workshop Papersclosedconf/glvlsi/Ordonez-CardenasR0810.1145/1366110.1366188https://doi.org/10.1145/1366110.1366188https://dblp.org/rec/conf/glvlsi/Ordonez-CardenasR08URL#5352697Philipp V. PanitzMarkus OlbrichErich BarkeMarkus BühlerJürgen KoehlConsidering possible opens in non-tree topology wire delay calculation.ACM Great Lakes Symposium on VLSI17-222008Conference and Workshop Papersclosedconf/glvlsi/PanitzOBBK0810.1145/1366110.1366118https://doi.org/10.1145/1366110.1366118https://dblp.org/rec/conf/glvlsi/PanitzOBBK08URL#5352698Abu Saad PapaMadhu MutyamPower management of variation aware chip multiprocessors.ACM Great Lakes Symposium on VLSI423-4282008Conference and Workshop Papersclosedconf/glvlsi/PapaM0810.1145/1366110.1366211https://doi.org/10.1145/1366110.1366211https://dblp.org/rec/conf/glvlsi/PapaM08URL#5352699Kimish PatelWonbok LeeMassoud PedramIn-order pulsed charge recycling in off-chip data buses.ACM Great Lakes Symposium on VLSI371-3742008Conference and Workshop Papersclosedconf/glvlsi/PatelLP0810.1145/1366110.1366198https://doi.org/10.1145/1366110.1366198https://dblp.org/rec/conf/glvlsi/PatelLP08URL#5352700Suganth PaulRajesh GargSunil P. KhatriPipelined network of PLA based circuit design.ACM Great Lakes Symposium on VLSI213-2182008Conference and Workshop Papersclosedconf/glvlsi/PaulGK0810.1145/1366110.1366162https://doi.org/10.1145/1366110.1366162https://dblp.org/rec/conf/glvlsi/PaulGK08URL#5352701Almitra PradhanRanga VemuriA layout-aware analog synthesis procedure inclusive of dynamic module geometry selection.ACM Great Lakes Symposium on VLSI159-1622008Conference and Workshop Papersclosedconf/glvlsi/PradhanV0810.1145/1366110.1366150https://doi.org/10.1145/1366110.1366150https://dblp.org/rec/conf/glvlsi/PradhanV08URL#5352702Richard PutmanUsing reiterative LFSR based X-masking to increase output compression in presence of unknowns.ACM Great Lakes Symposium on VLSI355-3582008Conference and Workshop Papersclosedconf/glvlsi/Putman0810.1145/1366110.1366194https://doi.org/10.1145/1366110.1366194https://dblp.org/rec/conf/glvlsi/Putman08URL#5352703Zhenyu QiMircea R. StanNBTI resilient circuits using adaptive body biasing.ACM Great Lakes Symposium on VLSI285-2902008Conference and Workshop Papersclosedconf/glvlsi/QiS0810.1145/1366110.1366179https://doi.org/10.1145/1366110.1366179https://dblp.org/rec/conf/glvlsi/QiS08URL#5352704Meikang QiuJiande WuEnergy saving for memory with loop scheduling and prefetching.ACM Great Lakes Symposium on VLSI155-1582008Conference and Workshop Papersclosedconf/glvlsi/QiuW0810.1145/1366110.1366149https://doi.org/10.1145/1366110.1366149https://dblp.org/rec/conf/glvlsi/QiuW08URL#5352705Md. Sajjad RahamanMasud H. ChowdhuryImproved ber performance in intra-chip rf/wireless interconnect systems.ACM Great Lakes Symposium on VLSI303-3082008Conference and Workshop Papersclosedconf/glvlsi/RahamanC0810.1145/1366110.1366182https://doi.org/10.1145/1366110.1366182https://dblp.org/rec/conf/glvlsi/RahamanC08URL#5352706N. RanganathanUpavan GuptaVenkataraman MahalingamSimultaneous optimization of total power, crosstalk noise, and delay under uncertainty.ACM Great Lakes Symposium on VLSI171-1762008Conference and Workshop Papersclosedconf/glvlsi/RanganathanGM0810.1145/1366110.1366154https://doi.org/10.1145/1366110.1366154https://dblp.org/rec/conf/glvlsi/RanganathanGM08URL#5352707J. V. R. RavindraM. B. SrinivasGeneric sub-space algorithm for generating reduced order models of linear time varying vlsi circuits.ACM Great Lakes Symposium on VLSI111-1142008Conference and Workshop Papersclosedconf/glvlsi/RavindraS0810.1145/1366110.1366138https://doi.org/10.1145/1366110.1366138https://dblp.org/rec/conf/glvlsi/RavindraS08URL#5352708Nikolai RyzhenkoOleg VengerA practical repeater insertion flow.ACM Great Lakes Symposium on VLSI261-2662008Conference and Workshop Papersclosedconf/glvlsi/RyzhenkoV0810.1145/1366110.1366174https://doi.org/10.1145/1366110.1366174https://dblp.org/rec/conf/glvlsi/RyzhenkoV08URL#5352709Ashoka Visweswara SathanurAntonio PulliniLuca BeniniAlberto MaciiEnrico MaciiMassimo PoncinoOptimal sleep transistor synthesis under timing and area constraints.ACM Great Lakes Symposium on VLSI177-1822008Conference and Workshop Papersclosedconf/glvlsi/SathanurPBMMP0810.1145/1366110.1366155https://doi.org/10.1145/1366110.1366155https://dblp.org/rec/conf/glvlsi/SathanurPBMMP08URL#5352710Nathan O. ScottGerhard W. DueckPairwise decomposition of toffoli gates in a quantum circuit.ACM Great Lakes Symposium on VLSI231-2362008Conference and Workshop Papersclosedconf/glvlsi/ScottD0810.1145/1366110.1366168https://doi.org/10.1145/1366110.1366168https://dblp.org/rec/conf/glvlsi/ScottD08URL#5352711Shervin SharifiTajana Simunic RosingAn analytical model for the upper bound on temperature differences on a chip.ACM Great Lakes Symposium on VLSI417-4222008Conference and Workshop Papersclosedconf/glvlsi/SharifiR0810.1145/1366110.1366210https://doi.org/10.1145/1366110.1366210https://dblp.org/rec/conf/glvlsi/SharifiR08URL#5352712Raghid ShreihMaitham ShamsImplementation of asynchronous pipeline circuits in multi-threshold CMOS technologies.ACM Great Lakes Symposium on VLSI189-1942008Conference and Workshop Papersclosedconf/glvlsi/ShreihS0810.1145/1366110.1366157https://doi.org/10.1145/1366110.1366157https://dblp.org/rec/conf/glvlsi/ShreihS08URL#5352713Greg StittHardware/software partitioning with multi-version implementation exploration.ACM Great Lakes Symposium on VLSI143-1462008Conference and Workshop Papersclosedconf/glvlsi/Stitt0810.1145/1366110.1366146https://doi.org/10.1145/1366110.1366146https://dblp.org/rec/conf/glvlsi/Stitt08URL#5352714Greg StittJason R. VillarrealRecursion flattening.ACM Great Lakes Symposium on VLSI131-1342008Conference and Workshop Papersclosedconf/glvlsi/StittV0810.1145/1366110.1366143https://doi.org/10.1145/1366110.1366143https://dblp.org/rec/conf/glvlsi/StittV08URL#5352715André SülflowGörschwin FeyRoderick BloemRolf DrechslerUsing unsatisfiable cores to debug multiple design errors.ACM Great Lakes Symposium on VLSI77-822008Conference and Workshop Papersclosedconf/glvlsi/SulflowFBD0810.1145/1366110.1366131https://doi.org/10.1145/1366110.1366131https://dblp.org/rec/conf/glvlsi/SulflowFBD08URL#5352716Xianfang TanLei Zhang 0014Shankar NeelkrishnanMei YangYingtao JiangYulu YangScalable and fault-tolerant network-on-chip design usingthe quartered recursive diagonal torus topology.ACM Great Lakes Symposium on VLSI309-3142008Conference and Workshop Papersclosedconf/glvlsi/TanZNYJY0810.1145/1366110.1366184https://doi.org/10.1145/1366110.1366184https://dblp.org/rec/conf/glvlsi/TanZNYJY08URL#5352717Min-Chun TsaiA formula of STI cmp design rule.ACM Great Lakes Symposium on VLSI11-162008Conference and Workshop Papersclosedconf/glvlsi/Tsai0810.1145/1366110.1366117https://doi.org/10.1145/1366110.1366117https://dblp.org/rec/conf/glvlsi/Tsai08URL#5352718Vamsi VankamamidiFabrizio LombardiDesign of defect tolerant tile-based QCA circuits.ACM Great Lakes Symposium on VLSI237-2422008Conference and Workshop Papersclosedconf/glvlsi/VankamamidiL0810.1145/1366110.1366169https://doi.org/10.1145/1366110.1366169https://dblp.org/rec/conf/glvlsi/VankamamidiL08URL#5352719Girish VaratkarSriram NarayananNaresh R. ShanbhagDouglas L. JonesTrends in energy-efficiency and robustness using stochastic sensor network-on-a-chip.ACM Great Lakes Symposium on VLSI351-3542008Conference and Workshop Papersclosedconf/glvlsi/VaratkarNSJ0810.1145/1366110.1366193https://doi.org/10.1145/1366110.1366193https://dblp.org/rec/conf/glvlsi/VaratkarNSJ08URL#5352720Arunprasad VenkatramanRajesh GargSunil P. KhatriA robust, fast pulsed flip-flop design.ACM Great Lakes Symposium on VLSI119-1222008Conference and Workshop Papersclosedconf/glvlsi/VenkatramanGK0810.1145/1366110.1366140https://doi.org/10.1145/1366110.1366140https://dblp.org/rec/conf/glvlsi/VenkatramanGK08URL#5352721Pablo VianaAnn Gordon-RossEdna BarrosFrank VahidA table-based method for single-pass cache optimization.ACM Great Lakes Symposium on VLSI71-762008Conference and Workshop Papersclosedconf/glvlsi/VianaGBV0810.1145/1366110.1366129https://doi.org/10.1145/1366110.1366129https://dblp.org/rec/conf/glvlsi/VianaGBV08URL#5352722Lun-Chun WeiHung-Ming ChenLi-Da HuangSarah Songjie XuEfficient and optimal post-layout double-cut via insertion by network relaxation and min-cost maximum flow.ACM Great Lakes Symposium on VLSI359-3622008Conference and Workshop Papersclosedconf/glvlsi/WeiCHX0810.1145/1366110.1366195https://doi.org/10.1145/1366110.1366195https://dblp.org/rec/conf/glvlsi/WeiCHX08URL#5352723Wayne H. WolfGLSVLSI 2008 invited/keynote talk.ACM Great Lakes Symposium on VLSI223-2242008Conference and Workshop Papersclosedconf/glvlsi/Wolf0810.1145/1366110.1366165https://doi.org/10.1145/1366110.1366165https://dblp.org/rec/conf/glvlsi/Wolf08URL#5352724Jingye XuPervez KhaledMasud H. ChowdhuryFast bus waveform estimation at the presence of coupling noise.ACM Great Lakes Symposium on VLSI339-3422008Conference and Workshop Papersclosedconf/glvlsi/XuKC0810.1145/1366110.1366190https://doi.org/10.1145/1366110.1366190https://dblp.org/rec/conf/glvlsi/XuKC08URL#5352725Kang ZhaoJinian BianSheqin DongYang Song 0002Satoshi GotoHyMacs: hybrid memory access optimization based on custom-instruction scheduling.ACM Great Lakes Symposium on VLSI89-942008Conference and Workshop Papersclosedconf/glvlsi/ZhaoBDSG0810.1145/1366110.1366133https://doi.org/10.1145/1366110.1366133https://dblp.org/rec/conf/glvlsi/ZhaoBDSG08URL#5352726Yexin ZhengMichael S. HsiaoChao HuangSAT-based equivalence checking of threshold logic designs for nanotechnologies.ACM Great Lakes Symposium on VLSI225-2302008Conference and Workshop Papersclosedconf/glvlsi/ZhengHH0810.1145/1366110.1366167https://doi.org/10.1145/1366110.1366167https://dblp.org/rec/conf/glvlsi/ZhengHH08URL#5352727Vijaykrishnan NarayananZhiyuan YanEnrico MaciiSanjukta BhanjaProceedings of the 18th ACM Great Lakes Symposium on VLSI 2008, Orlando, Florida, USA, May 4-6, 2008ACM Great Lakes Symposium on VLSIACM2008Editorshipconf/glvlsi/200810.1145/1366110https://doi.org/10.1145/1366110https://dblp.org/rec/conf/glvlsi/2008URL#5430103